Recursive Filtering on Simd Architectures

Recursive filters are used frequently in digital signal processing. They can be implemented in dedicated hardware or in software on a digital signal processor (DSP). Software solutions often are preferable for their speed of implementation and flexibility. However, contemporary DSPs are mostly not fast enough to perform filtering for high datarates or large filters. A method to increase the computational power of a DSP without sacrificing efficiency is to use multiple processor elements controled by the singleinstruction multiple-data (SIMD) paradigm. The parallelization of recursive algorithms is difficult, because of the data dependencies. We are using design methods for parallel procesor arrays to realize implementations that can be used on a parallel DSP. Further, we are focusing on the partitioning of the algorithm so that the realization can be used for different architectures. Consequences for the architecture are considered, too.